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the right, at its sole discretion, to change the Documentation without notice at any time. Xilinx assumes no obligation to correct any errors
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Revision History
The following table shows the revision history for this document.
Date
06/28/05
09/28/05
11/06/06
03/02/07
02/06/08
05/30/08
Version
1.0
1.0.1
1.1
1.2
1.2.1
1.3
Revision
Initial Xilinx release.
In “Package Contents” section, added SMA wrench and deleted NQSL board.
Minor text edits for clarity.
Added “22. System ACE MPU Port” section. Miscellaneous typographical edits.
Added “Additional Documentation” section. Updated “Package Contents” section.
Added “Additional Information” section.
Updated Legal disclaimer. Updated the link to the product page in “Additional
Information.”
Added the ML421 reference designators in Table 2, page 13 . Added the ML424 reference
designators in Table 3, page 14 . Corrected VTT RX LEFT and VTT RX RIGHT for the
ML421 and ML423 in Table 3, page 14 . Corrected labels for ML423 in Table 8, page 16 .
Corrected pins 29, 31, 33, and 35 for ML424 in Table 14, page 19 . Corrected VCC for
ML421, ML423, and ML424 in Table 16, page 21 . Corrected pin 62 for ML423 and pins 30
and 32 for ML424 in Table 18, page 22 . Corrected labels J115 through J118 for ML423 in
Table 21, page 25 . Corrected MPA00 and MPA04 for ML421, and MPA06 for ML423 in
Table 23, page 30 .
ML42 x User Guide
www.xilinx.com
UG087 (v1.3) May 30, 2008
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